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Short-circuit robustness testing of SiC MOSFETs

机译:SiC MOSFET的短路鲁棒性测试

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摘要

Summary form only given. The complete presentation was not made available for publication as part of the conference proceedings. This paper presents electrical results for two different commercial devices and one prototype 1.2 kV SiC power MOSFET device subject to short-circuit (SC) stress. Two failure modes were observed among the devices tested, with one mode of failure resulting in catastrophic device destruction and the other resulting in permanent damage of the insulating gate dielectric manifested as a leakage current of 400 mA. Short-circuit pulses of increasing time duration caused a reduction in the gate-to-source voltage toward the falling edge of the pulse. This phenomenon is a precursor to failure of SiC MOSFETs under SC stress, but this reduction in VGS is not known to occur in silicon-based devices. The measured short-circuit withstand times for commercial devices from group A and B MOSFETs were 8 μs and 12 μs, respectively. MOSFET-C devices had a withstand time of 7 μs. A larger chip size improves robustness even for large values of peak short-circuit current.
机译:仅提供摘要表格。完整的演示文稿未作为会议记录的一部分公开发布。本文介绍了两种不同的商用设备和一种经受短路(SC)应力的原型1.2 kV SiC功率MOSFET器件的电气结果。在测试的设备中观察到两种故障模式,一种故障模式导致灾难性的设备破坏,另一种故障模式导致绝缘栅电介质永久损坏,表现为泄漏电流为400 mA。持续时间增加的短路脉冲会导致栅极-源极电压朝着脉冲的下降沿下降。这种现象是SiC MOSFET在SC应力下失效的先兆,但尚不知道在硅基器件中会发生VGS的这种降低。对于A组和B组MOSFET的商用器件,测得的短路耐受时间分别为8μs和12μs。 MOSFET-C器件的耐受时间为7μs。即使对于较大的峰值短路电流,较大的芯片尺寸也会提高鲁棒性。

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