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首页> 外文会议>42nd international symposium on microelectronics (IMAPS 2009) >Near Chip Scale Package for High Power, Big Chip LEDs
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Near Chip Scale Package for High Power, Big Chip LEDs

机译：适用于大功率大芯片LED的近芯片级封装

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High power LEDs are rapidly evolving into devices that progressively bear less and less resemblance tornthe LEDs that we used to know. Today’s LEDs feature higher brightness levels, higher operating power levels,rnlarger die/emitter sizes, a shift from edge emission to surface emission, enhanced extraction and collimation of light,rnand increased efficacies. These changes are enabling applications that until now have been dominated by mercuryarc,rnhigh intensity discharge, halogen, incandescent and fluorescent bulbs, and previously were beyond therncapability of LEDs. Now that LEDs can compete in many high brightness applications previously occupied by morerntraditional forms of lighting, new innovative forms of LED packaging are required. Handling high-density thermalrndissipation, high optical power levels, tight mechanical tolerances and high current electrical interconnects nowrnrequire packaging approaches that were previously unconventional, even unheard of, for LEDs. In order to addressrnthese new LED package requirements, a near-chip-scale package has been developed which is a drastic departurernfrom traditional LED packages. This new packaging platform has borrowed from, and built on, a mix of packagingrntechnologies more commonly associated with laminate array style BGA, CSP, and flip-chip devices. This paperrnpresents the challenges encountered, and solutions implemented during design of the package and the associatedrnprocess development. The package structural, thermal, optical and electrical design inputs are presented as well asrnthe subsequent design approaches, including materials selection, risk prioritization, and designing forrnmanufacturability and reliability. The resultant package is a revolutionary, very compact, surface mount devicernwhich features a junction-to-case thermal resistance of <0.6 degrees C/W for a 12 mm2 LED die, zero optical lossrn(100% transmission), close proximity optical interfacing due to elimination of wirebonds and their associated looprnheights, excellent compatibility with state-of-the-art assembly manufacturing lines, and design flexibility includingrnpotential for MCM and SiP integration.
机译：高功率LED正在迅速发展成为与我们过去所知的LED越来越少相似的设备。当今的LED具有更高的亮度水平，更高的工作功率水平，更大的管芯/发射极尺寸，从边缘发射向表面发射的转变，增强了光的提取和准直性以及更高的效率。这些变化使应用成为可能，直到现在为止，汞弧，高强度放电，卤素灯，白炽灯和荧光灯已成为主流，而LED的能力已经超出了以前。既然LED可以在以前被传统形式的照明所占据的许多高亮度应用中竞争，那么就需要新的创新形式的LED封装。现在，要处理高密度散热，高光功率水平，严格的机械公差和大电流电气互连，就需要以前对于LED而言甚至是闻所未闻的封装方法。为了满足这些新的LED封装要求，已经开发了一种接近芯片级的封装，这与传统的LED封装大相径庭。这个新的封装平台借鉴了多种封装技术，并以这些技术为基础，这些技术通常与层压阵列式BGA，CSP和倒装芯片设备相关。本文介绍了在包装设计以及相关的过程开发过程中遇到的挑战和实现的解决方案。介绍了封装的结构，热，光学和电气设计输入，以及随后的设计方法，包括材料选择，风险优先级划分和可制造性和可靠性设计。最终的封装是一种革命性的，非常紧凑的表面安装器件，对于12 mm2的LED裸片，其结至外壳的热阻<0.6摄氏度/瓦，光损耗为零（透射率100％），具有紧密的光学接口消除了引线键合及其相关的线圈高度，与最新的装配生产线的出色兼容性以及设计灵活性，包括MCM和SiP集成的潜力。

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