Department of Electrical and Computer Engineering, University of California, Riverside, USA;
Department of Electrical and Computer Engineering, University of California, Riverside, USA;
Department of Electrical and Computer Engineering, University of California, Riverside, USA;
Department of Electrical and Computer Engineering, University of California, Riverside, USA;
Department of Electrical and Computer Engineering, University of California, Riverside, USA;
Department of Electrical and Computer Engineering, University of California, Riverside, USA;
SMIC, China;
Department of Electrical and Computer Engineering, University of California, Riverside, USA;
Electrostatic discharges; Layout; Integrated circuits; Rectifiers; Robustness; Foundries; Electron devices;
机译:纳米CMOS技术中具有嵌入式SCR结构作为电源轨ESD钳位设备的I / O单元的ESD保护设计
机译:LVTSCR结构用于BiCMOS RF电路的无闩锁ESD保护
机译:具有双寄生SCR结构的新型片上ESD保护电路,用于CMOS VLSI
机译:逐细胞SCR ESD保护结构28nm CMOS
机译:纳米级CMOS中的ESD保护问题。
机译:具有嵌入式PMOSFET的鲁棒和锁定的免疫LVTSCR器件用于28 nm CMOS过程中的ESD保护
机译:采用华夫饼结构可控硅的全集成CmOs射频功率放大器的EsD保护设计