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Optimal proximity correction: a

机译：最佳接近校正：

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Abstract: Proximity Correction is the technology for which the most of IC manufacturers are committed already. The final intended result of correction is affected by many factors other than the optical characteristics of the mask-stepper system, such as photoresist exposure, post-exposure bake and development parameters, etch selectivity and anisotropy, and underlying topography. The most advanced industry and research groups already reported immediate need to consider wafer topography as one of the major components during a Proximity Correction procedure. In the present work we are discussing the corners rounding effect (which eventually cause electrical leakage) observed for the elements of Poly2 layer for a Flash Memory Design. It was found that the rounding originated by three- dimensional effects due to variation of photoresist thickness resulting from the non-planar substrate. Our major goal was to understand the reasons and correct corner rounding. As a result of this work highly effective layout correction methodology was demonstrated and manufacturable Depth Of Focus was achieved. Another purpose of the work was to demonstrate complete integration flow for a Flash Memory Design based on photolithography; deposition/etch; ion implantation/oxidation/diffusion; and device simulators. !11
机译：摘要：接近校正是大多数IC制造商已经致力于的技术。除掩模-步进器系统的光学特性外，校正的最终预期结果还受许多因素影响，例如光致抗蚀剂曝光，曝光后烘烤和显影参数，蚀刻选择性和各向异性以及底层形貌。最先进的行业和研究小组已经报告说，迫近需要在接近校正过程中将晶片的形貌作为主要组成部分之一。在本工作中，我们将讨论为闪存设计中的Poly2层的元素观察到的圆角倒圆效果（最终导致漏电）。已经发现，由于非平面衬底导致的光致抗蚀剂厚度的变化，修圆是由三维效应引起的。我们的主要目标是了解原因并纠正圆角。这项工作的结果证明了一种高效的布局校正方法，并实现了可制造的景深。这项工作的另一个目的是演示基于光刻的闪存设计的完整集成流程。沉积/蚀刻；离子注入/氧化/扩散；和设备模拟器。 ！11

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