首页> 外文学位 >All-copper chip-to-substrate interconnects for high performance integrated circuit devices.
【24h】

All-copper chip-to-substrate interconnects for high performance integrated circuit devices.

机译:用于高性能集成电路器件的全铜芯片到衬底互连。

获取原文
获取原文并翻译 | 示例

摘要

In this work, all-copper connections between silicon microchips and substrates are developed. The semiconductor industry advances the transistor density on a microchip based on the roadmap set by Moore's Law. Communicating with a microprocessor which has nearly one billion transistors is a daunting challenge. Interconnects from the chip to the system (i.e. memory, graphics, drives, power supply) are rapidly growing in number and becoming a serious concern. Specifically, the solder ball connections that are formed between the chip itself and the package are challenging to make and still have acceptable electrical and mechanical performance. These connections are being required to increase in number, increase in power current density, and increase in off-chip operating frequency. Many of the challenges with using solder connections are limiting these areas. In order to advance beyond the limitations of solder for electrical and mechanical performance, a novel approach to creating all-copper connections from the chip-to-substrate has been developed. The development included characterizing the electroless plating and annealing process used to create the connections, designing these connections to be compatible with the stress requirements for fragile low-k devices, and finally by improving the plating/annealing process to become process time competitive with solder. This work resulted in many significant conclusions about the mechanism for bonding in the all-copper process and the significance of materials and geometry on the mechanical design for these connections.
机译:在这项工作中,开发了硅微芯片和基板之间的全铜连接。半导体行业根据摩尔定律制定的路线图提高了微芯片上的晶体管密度。与拥有近十亿个晶体管的微处理器进行通信是一项艰巨的挑战。从芯片到系统的互连(即存储器,图形,驱动器,电源)的数量正在迅速增长,并成为一个严重的问题。具体而言,在芯片本身与封装之间形成的焊球连接具有挑战性,并且仍然具有可接受的电气和机械性能。这些连接需要增加数量,增加功率电流密度并增加片外工作频率。使用焊料连接的许多挑战限制了这些区域。为了超越焊料在电气和机械性能方面的限制,已经开发出一种新颖的方法来创建从芯片到基板的全铜连接。开发包括表征用于创建连接的化学镀和退火工艺,将这些连接设计为与易碎的低k器件的应力要求兼容,并最终通过改进电镀/退火工艺以使其在工艺时间上与焊料竞争。这项工作得出了许多关于全铜工艺中的结合机理以及这些连接的机械设计中材料和几何形状的重要性的重要结论。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号