Novel advanced analytical design tool for 4H-SiC VDMOSFET devices

机译：适用于4H-SiC VDMOSFET器件的新型高级分析设计工具

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Summary form only given. The complete presentation was not made available for publication as part of the conference proceedings. An analytical tool to design 4H-SiC power vertical Double-diffused Metal-Oxide-Semiconductor Field-Effect-Transistor is proposed. The model optimizes, in terms of the doping concentration in the Drift-region, the trade-off between the ON-resistance, RON, and the maximum blocking voltage, VBL, that is the Drain-Source voltage for which the avalanche breakdown appears at the p+-well-DRIFT junction together with the breakdown of the Gate oxide. Finding such trade-off means to maximize FOM = V2BL/RON, Figure-Of-Merit. Our results are based on a novel full-analytical model of the electric field in the Gate oxide, EOX, whose generality is ensured by the absence of fitting and empirical parameters. Model results are successfully compared with 2D-simulations covering a wide range of device performances.

机译：仅提供摘要表格。完整的演示文稿未作为会议记录的一部分公开发布。提出了一种设计4H-SiC功率垂直双扩散金属氧化物半导体场效应晶体管的分析工具。该模型根据漂移区中的掺杂浓度优化了导通电阻RON与最大阻断电压VBL（即漏源电压）之间的折衷，雪崩击穿出现在该漏源电压上p +阱/ n-DRIFT结以及栅极氧化物的击穿。找到这样的权衡意味着最大化FOM = V2BL / RON，品质因数。我们的结果基于门氧化物EOX中电场的新型完整分析模型，该模型的通用性是通过缺少拟合和经验参数来确保的。模型结果已成功与涵盖多种设备性能的2D仿真进行了比较。

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来源
《2016 European Conference on Silicon Carbide amp; Related Materials》|2016年|1-1|共1页
会议地点 Halkidiki(GR)
作者
L. Di Benedetto; G. D. Licciardo; T. Erlbacher; A. J. Bauer; A. Rubino;
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作者单位

Department of Industrial Engineering, University of Salerno, Italy;

Department of Industrial Engineering, University of Salerno, Italy;

Fraunhofer Institute for Integrated Systems and Device Technology (IISB), Germany;

Fraunhofer Institute for Integrated Systems and Device Technology (IISB), Germany;

Department of Industrial Engineering, University of Salerno, Italy;

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会议组织
原文格式 PDF
正文语种 eng
中图分类
关键词
Semiconductor process modeling; Logic gates; Doping; Junctions; Electric fields; Semiconductor device modeling; Breakdown voltage;

机译：半导体工艺建模逻辑门掺杂结电场半导体器件建模击穿电压;

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专利

1. Novel Advanced Analytical Design Tool for 4H-SiC VDMOSFET Devices [J] . L. Di Benedetto, G.D. Licciardo, T. Erlbacher, Materials science forum . 2017,第期

机译：适用于4H-SiC VDMOSFET器件的新型高级分析设计工具
2. Correction to “Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability” [J] . Xu Chuan, Kolluri Seshadri K., Endo Kazhuhiko, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 2020,第1期

机译：校正“具有设计与可靠性的高级FinFET设备自加热模型的分析热模型”
3. Advanced Energy Storage Devices: Basic Principles, Analytical Methods, and Rational Materials Design [J] . Jilei Liu, Jin Wang, Chaohe Xu, Advanced Science . 2017,第1期

机译：先进的储能设备：基本原理，分析方法和合理的材料设计
4. Novel advanced analytical design tool for 4H-SiC VDMOSFET devices [C] . L. Di Benedetto, G. D. Licciardo, T. Erlbacher, European Conference on Silicon Carbide Related Materials . 2016

机译：4H-SIC VDMOSFET设备的新型高级分析设计工具
5. Advanced Data Analysis Tools for Expanding the Application and Capabilities of Portable Chemical Sensing Devices [D] . Peirano, Daniel J. 2016

机译：用于扩展便携式化学传感设备的应用和功能的高级数据分析工具
6. Advanced Energy Storage Devices: Basic Principles Analytical Methods and Rational Materials Design [O] . Jilei Liu, Jin Wang, Chaohe Xu, 2018

机译：先进的储能设备：基本原理分析方法和合理的材料设计
7. A Compact Trench-Assisted Space-Modulated JTE Design for High-Voltage 4H-SiC Devices [O] . T. Dai, L. Zhang, O. Vavasour, 2021

机译：用于高压4H-SIC器件的紧凑型沟槽辅助空间调制JTE设计

Novel advanced analytical design tool for 4H-SiC VDMOSFET devices

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