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Modification of existing chip layout for yield and reliability improvement by computer aided design tools

机译:通过计算机辅助设计工具修改现有芯片布局,以提高良率和可靠性

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摘要

A CAD flow has been developed to modify an existing large scale chip layout to reinforce the redundant via design rules to improve the yield and reliability. The flow operates on each metal-via pair from bottom up to correct the redundant via rule violations. It divides a large complex design into cells, so that multiple process can work concurrently as if every process were working on the top level to reach the goal in a reasonable time.
机译:已经开发了CAD流程来修改现有的大规模芯片布局,以通过设计规则加强冗余,从而提高良率和可靠性。该流程从下至上在每个金属通孔对上进行操作,以通过违反规则来纠正冗余。它将大型复杂设计划分为多个单元,以便多个进程可以同时工作,就好像每个进程都在顶层工作一样,可以在合理的时间内达到目标。

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