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首页> 外文会议>Metrology, Inspection, and Process Control for Microlithography XX pt.2 >From Speculation to Specification: A Discussion on How to Define the Tolerance of LER/LWR and its Measurement Methodology
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From Speculation to Specification: A Discussion on How to Define the Tolerance of LER/LWR and its Measurement Methodology

机译：从推测到规范：关于如何定义LER / LWR的公差及其测量方法的讨论

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Metrological definition and the target value of linewidth roughness (LWR) in gate pattern of MOSFETS are discussed. The effects of sampling interval of gate-LWR measurements using critical dimension scanning electron microscopy (CD-SEM) on the measurement accuracy was examined by both experiment and simulation. It was found that a 10-nm interval is sufficiently small to fully characterize roughness in a typically chosen 2-μm-long line with considering the LWR measurement error. Random image noise and intrinsic LWR variations are found to cause larger impacts on the measured value than the finiteness of the sampling interval. A practical procedure for improving the measurement accuracy is also discussed. Moreover, a methodology for establishing the gate-LWR target is proposed. Threshold-voltage shift caused by gate-LWR is given by using the LWR spectrum and the Ⅰ-Ⅴ curves of a transistor without LWR (ideal Ⅰ-Ⅴ curves). In order to calculate the target value, the ideal Ⅰ-Ⅴ curves, the typical gate width of the transistor and the tolerance for LWR-caused threshold-voltage variation are to be clarified.
机译：讨论了MOSFET栅极图案中线宽粗糙度（LWR）的计量定义和目标值。通过实验和仿真研究了使用临界尺寸扫描电子显微镜（CD-SEM）进行栅极LWR测量的采样间隔对测量精度的影响。已经发现，考虑到LWR测量误差，通常在选择的2 µm长的线中，10 nm的间隔足够小以完全表征粗糙度。发现随机图像噪声和固有LWR变化对测量值的影响大于采样间隔的有限性。还讨论了提高测量精度的实用程序。此外，提出了用于建立栅极LWR目标的方法。利用LWR频谱和不带LWR的晶体管的Ⅰ-Ⅴ曲线（理想的Ⅰ-Ⅴ曲线），给出了由栅极LWR引起的阈值电压漂移。为了计算目标值，需要阐明理想的Ⅰ-Ⅴ曲线，晶体管的典型栅极宽度和LWR引起的阈值电压变化的容差。

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