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首页> 外文会议>Microelectronics technology and devices - SBMicro 2010 >Analog Operation and Harmonic Distortion Temperature Dependence of nMOS Junctionless Transistors
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Analog Operation and Harmonic Distortion Temperature Dependence of nMOS Junctionless Transistors

机译：nMOS无结晶体管的模拟操作和谐波失真温度依赖性

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摘要

Due to the decreasing gate control on the channel charges, planar MOS devices have become inadequate for nodes beyond 45 nm (1). For this reason, the development of new structures has been necessary. Amongst several alternatives, multiple gate devices such as FinFETs and Trigate transistors have emerged as strong candidates to future technologies. Multigate devices present a silicon nanowire surrounded by gate material, providing a significant improvement on the control of the channel charges. However, as the gate length is scaled, these multigate structures have to present sharper source and drain junctions, which can become a bottleneck in extremely shorter devices due to tunneling effect where ultra-sharp junctions shall be performed. The formation of these junctions presents a challenge since it requires extremely precise doping and thermal conditions to avoid the lateral diffusion of impurities to the channel. To avoid this problem, a novel structure called Junctionless multigate field-effect transistor has been recently proposed (2).
机译：由于减少了对沟道电荷的栅极控制，平面MOS器件已不足以用于45 nm以上的节点（1）。因此，必须开发新的结构。在多种选择中，诸如FinFET和Trigate晶体管的多栅极器件已成为未来技术的强大候选者。多栅极器件呈现出被栅极材料包围的硅纳米线，从而大大改善了沟道电荷的控制。但是，随着栅极长度的按比例缩放，这些多栅极结构必须呈现更尖锐的源极和漏极结，由于要进行超陡峭结的隧道效应，在极短的器件中这可能成为瓶颈。这些结的形成提出了挑战，因为它需要极其精确的掺杂和热条件，以避免杂质横向扩散到沟道。为了避免这个问题，最近提出了一种新颖的结构，称为无结多栅极场效应晶体管（2）。

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  • 来源
  • 会议地点 Sao Paulo(BR);Sao Paulo(BR)
  • 作者

    R. T. Doria; M. A. Pavanello; C. W. Lee; I. Ferain; N. Dehdashti-Akhavan; et al;

  • 作者单位

    LSI/PSI/USP - University of Sao Paulo Av. Prof. Luciano Gualberto, trav. 3, n. 158, 05508-900, Sao Paulo, Brazil;

    rn Department of Electrical Engineering, Centra Universitario da FEI - Sao Bernardo do Campo, Brazil;

    Tyndall National Institute, UCC - Lee Maltings, Prospect Row, Cork, Ireland;

    Tyndall National Institute, UCC - Lee Maltings, Prospect Row, Cork, Ireland;

    Tyndall National Institute, UCC - Lee Maltings, Prospect Row, Cork, Ireland;

    et al;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 半导体技术;
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