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首页> 外文会议>Microelectronics technology and devices - SBMicro 2010 >From Deep Trenches to Sky Scrapers - On some issues concerning the technology and design of embedded DRAM and three dimensional integrated circuits form memory applications
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From Deep Trenches to Sky Scrapers - On some issues concerning the technology and design of embedded DRAM and three dimensional integrated circuits form memory applications

机译：从深沟到天空刮板-关于嵌入式DRAM和三维集成电路构成存储器应用的技术和设计的一些问题

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On-chip memory dominates die area for most processor and logic designs. For the last several years embedded DRAM has become successful in replacing conventional SRAM for many of these applications. We will outline the key requirements of embedded memory and the tradeoffs between SRAM and DRAM for these applications. As scaling has progressed into the 45 nm regime and beyond, SRAM scaling has become more difficult and it has become difficult to reduce the SRAM voltages due to instabilities that develop as voltage is lowered. Embedded DRAMs offer a 3-4X density advantage, a better than 5X standby power advantage, and a significantly higher resistance to soft error upsets. In the future, three dimensional integration (3Di) of circuits is an attractive approach to stay on the semiconductor productivity roadmap. Briefly, the principal value of 3-D integration lies in increasing the volumetric transistor density with the potential benefit of shorter electrical path lengths through use of the shorter third dimension. However, as we study this problem in some detail we uncover a serious set of constraints especially for high performance applications. These constraints can be classified in four broad categories: the overhead and design constraints of through silicon vias (TSVs); Power delivery and distribution in multiple strata; heat dissipation across the 3 D stack; and finally reparability of the 3D stack. In this talk we will examine these constraints in detail based on our experience with high end processors.
机译：对于大多数处理器和逻辑设计而言，片上存储器占主导地位。在过去的几年中，嵌入式DRAM已成功取代许多这些应用中的常规SRAM。我们将概述嵌入式存储器的关键要求以及这些应用在SRAM和DRAM之间的权衡。随着定标已经发展到45 nm及以上，SRAM定标变得更加困难，并且由于降低电压而导致的不稳定性，降低SRAM电压变得困难。嵌入式DRAM具有3-4倍的密度优势，优于5倍的待机功耗优势以及显着更高的抗软错误干扰能力。将来，电路的三维集成（3Di）是留在半导体生产率路线图上的一种有吸引力的方法。简而言之，3-D集成的主要价值在于通过使用较短的三维尺寸来提高体积晶体管密度，并具有缩短电气路径长度的潜在好处。但是，当我们详细研究此问题时，我们发现了一系列严重的限制，尤其是对于高性能应用程序。这些约束可以分为四大类：硅通孔（TSV）的开销和设计约束；多层次的电力输送和分配； 3D堆栈的散热；最后是3D堆栈的可修复性。在本次演讲中，我们将基于我们在高端处理器方面的经验详细研究这些约束。

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