This analysis investigates how the fatigue life of a solder grid array (SGA) interconnect may be increased by inducing residual forces in individual solder interconnects. The residual forces are presumed to arise from the surface tension of solder. The interconnects are loaded by a shear resulting from a difference in thermal expansion between the chip carrier and PCB. A fatigue crack growth model is proposed for the cycles to failure of an individual mixed-mode cracked interconnect. The model predicts how the relative fatigue life of an interconnect can be altered through changing the residual force by controlling the volume of solder at each interconnect.
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