Gate Overlapped Lightly Doped Drain Poly-Si TFTs Employing 45° Tilt Implant For Source and Drain

机译：栅极重叠轻掺杂漏极多晶硅薄膜晶体管，采用45°倾斜注入进行源极和漏极注入

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We propose a short channel gate overlapped lightly doped drain (GOLDD) poly-Si TFT employing 45° tilt implant for source and drain (S/D) regions without any additional ion doping or mask. Oblique-incident ELA activation is performed to activate both n+ S/D and n- LDD regions as well as cure junction defects. The proposed poly-Si TFT can suppress the anomalous leakage current, and exhibit the better reliability against the hot-carrier stress.

机译：我们提出了一种短沟道栅极重叠轻掺杂漏极（GOLDD）多晶硅TFT，采用45°倾斜注入的方式用于源极和漏极（S / D）区域，而无需任何其他离子掺杂或掩膜。进行斜入射ELA激活以激活n + S / D和n-LDD区域以及固化结缺陷。所提出的多晶硅TFT可以抑制异常漏电流，并表现出更好的可靠性以抵抗热载流子应力。

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《Symposium Proceedings vol.808; Symposium on Amorphous and Nanocrystalline Silicon Science and Technology - 2004; 20040413-16; San Francisco,CA(US)》|2004年|P.655-660|共6页
会议地点 San FranciscoCA(US)
作者
Jae-Hoon Lee; Moon-Young Shin; HeeSun Shin; Woo-Jin Nam; Min-Koo Han;
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School of Electrical Engineering, Seoul National University, Seoul 151 -742, Korea;

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正文语种 eng
中图分类材料;
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专利

1. Gate Overlapped Lightly Doped Drain Poly-Si TFTs Employing 45 deg Tilt Implant and OI-ELA Activation for S/D [J] . Jae-Hoon Lee, Joong-Hyun Park Electrochemical and solid-state letters . 2006,第5期

机译：采用45度倾斜注入和OI-ELA激活进行S / D的栅极重叠轻掺杂漏极多晶硅TFT
2. A novel thin-film transistor with step gate-overlapped lightly doped drain and raised source/drain design [J] . Chien Feng-Tso, Chen Jian-Liang, Chen Chien-Ming, Solid-State Electronics . 2017,第nova期

机译：一种新颖的薄膜晶体管，具有阶梯式栅极重叠的轻掺杂漏极和凸起的源极/漏极设计
3. The effect of gate overlap lightly doped drains on low temperature poly-Si thin film transistors [J] . Jaehyun Cho, Sungwook Jung, Kyungsoo Jang, Microelectronics reliability . 2012,第1期

机译：栅极重叠轻掺杂漏极对低温多晶硅薄膜晶体管的影响
4. Gate Overlapped Lightly Doped Drain Poly-Si TFTs Employing 45 ° Tilt Implant For Source and Drain [C] . Jae-Hoon Lee, Moon-Young Shin, HeeSun Shin, Symposium on Amorphous and Nanocrystalline Silicon Science and Technology . 2004

机译：门重叠轻微掺杂的漏极Poly-Si TFT，采用45°倾斜植入源和排水物
5. Implant Activated Source/Drain Regions for Self-Aligned IGZO TFT [D] . Chowdhury, Rahnuma Rifat . 2019

机译：用于自对准IGZO TFT的植入活性源/漏区
6. Raised Source/Drain (RSD) and Vertical Lightly Doped Drain (LDD) Poly-Si Thin-Film Transistor [O] . Feng-Tso Chien, Jing Ye, Wei-Cheng Yen, 2021

机译：凸源/漏极（RSD）和垂直掺杂漏极（LDD）多Si薄膜晶体管
7. Raised Source/Drain (RSD) and Vertical Lightly Doped Drain (LDD) Poly-Si Thin-Film Transistor [O] . Feng-Tso Chien, Jing Ye, Wei-Cheng Yen, 2021

机译：凸源/漏极（RSD）和垂直掺杂漏极（LDD）多Si薄膜晶体管
8. Modified Lightly Doped Drain Structure for VLSI (Very Large Scale Integration) MOSFET's [R] . Bampi, S., Plummer, J. D. 1986

机译：用于VLsI（超大规模集成）mOsFET的改进的轻掺杂漏极结构

Gate Overlapped Lightly Doped Drain Poly-Si TFTs Employing 45° Tilt Implant For Source and Drain

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