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High-K materials and metal gates for CMOS applications

机译：CMOS应用的高K材料和金属栅极

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摘要

The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin that the gate leakage current becomes too large. This led to the replacement of SiO_2 by a physically thicker layer of a higher dielectric constant or 'high-K' oxide such as hafnium oxide. Intensive research was carried out to develop these oxides into high quality electronic materials. In addition, the incorporation of Ge in the CMOS transistor structure has been employed to enable higher carrier mobility and performance. This review covers both scientific and technological issues related to the high-K gate stack - the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure, their electronic structure, band offsets, electronic defects, charge trapping and conduction mechanisms, reliability, mobility degradation and oxygen scavenging to achieve the thinnest oxide thicknesses. The high K oxides were implemented in conjunction with a replacement of polycrystalline Si gate electrodes with metal gates. The strong metallurgical interactions between the gate electrodes and the HfO_2 which resulted an unstable gate threshold voltage resulted in the use of the lower temperature 'gate last' process flow, in addition to the standard 'gate first' approach. Work function control by metal gate electrodes and by oxide dipole layers is discussed. The problems associated with high K oxides on Ge channels are also discussed.
机译：互补金属氧化物半导体（CMOS）晶体管的缩放比例已导致用作栅极电介质的二氧化硅层变得太薄，以至于栅极漏电流变得太大。这导致用较高介电常数或“高K”氧化物（例如氧化ha）的物理上较厚的层代替SiO_2。为了将这些氧化物开发成高质量的电子材料，进行了深入的研究。另外，已经将Ge结合到CMOS晶体管结构中以实现更高的载流子迁移率和性能。这篇综述涵盖了与高K栅极堆叠相关的科学和技术问题-氧化物的选择，其沉积，结构和冶金行为，原子扩散，界面结构，其电子结构，能带偏移，电子缺陷，电荷俘获和导电机理，可靠性，迁移率降低和除氧以实现最薄的氧化物厚度。结合用金属栅极代替多晶Si栅极电极来实现高K氧化物。栅电极和HfO_2之间的强冶金相互作用导致了不稳定的栅阈值电压，除了标准的“栅优先”方法外，还导致使用了较低温度的“栅后”工艺流程。讨论了通过金属栅电极和通过氧化物偶极层进行的功函数控制。还讨论了与锗通道上高K氧化物有关的问题。

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