Analysis of the substrate bias effect on the thermal properties of SOI UTBB transistors

机译：衬底偏置对SOI UTBB晶体管热性能的影响分析

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This work presents an analysis of the thermal resistance of Ultra-Thin Body and Buried Oxide (UTBB) SOI (Silicon-on-Insulator) MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) under a selected set of back gate biases (Vsub), with and without considering the effect of the ground plane. It has been shown that the thermal resistance increases as the substrate bias is reduced. For negative Vsub, a thicker depletion depth is induced by the back gate, confining the overall current closer to the front gate and increasing its density. A thermal resistance reduction of about 8-9% can be obtained by simply increasing the back bias from -2V up to 2 V.

机译：这项工作介绍了在选定的一组背栅偏置（Vsub）下，超薄体和埋入式氧化物（UTBB）SOI（绝缘体上硅）MOSFET（金属氧化物半导体场效应晶体管）的热阻分析结果，以及并且不考虑接地平面的影响。已经表明，随着衬底偏压的减小，热阻增加。对于负Vsub，后栅极会引起较厚的耗尽深度，从而将总电流限制在更靠近前栅极的位置，并增加其密度。只需将反偏压从-2V增加到2V，即可将热阻降低约8-9％。

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来源
《2017 32nd Symposium on Microelectronics Technology and Devices》|2017年|1-4|共4页
会议地点 Fortaleza(BR)
作者
Fernando J. Costa; Marcelo A. Pavanello; Renan Trevisoli; Rodrigo T. Doria;
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作者单位

Centro Universitário FEI, Electrical Engineering Department - São Bernardo do Campo, Brazil;

Centro Universitário FEI, Electrical Engineering Department - São Bernardo do Campo, Brazil;

Centro Universitário FEI, Electrical Engineering Department - São Bernardo do Campo, Brazil;

Centro Universitário FEI, Electrical Engineering Department - São Bernardo do Campo, Brazil;

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原文格式 PDF
正文语种 eng
中图分类
关键词
Logic gates; Thermal resistance; Substrates; Silicon; Silicon-on-insulator; Performance evaluation;

机译：逻辑门;热阻;基板;硅;绝缘体上硅;性能评估;;

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4. Analysis of the Substrate Bias Effect on the Thermal Properties of SOI UTBB Transistors [C] . Fernando J. Costa, Marcelo A. Pavanello, Renan Trevisoli, Symposium on Microelectronics Technology and Devices . 2017

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Analysis of the substrate bias effect on the thermal properties of SOI UTBB transistors

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