Modeling of stacking fault expansion velocity of body diode in 4H-SiC MOSFET

机译：4H-SiC MOSFET中体二极管堆叠故障扩展速度的建模

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Summary form only given. The complete presentation was not made available for publication as part of the conference proceedings. We present a model to explain forward voltage degradation of body diode in 4H-SiC MOSFET, and evaluate the velocity of SF expansion. First, by using in-situ photoluminescence (PL) observation, we investigated how a stacking fault (SF) expands from a basal plane dislocations (BPD) in the 4H-SiC epitaxial layer. Second, double-diffused MOSFETs were developed and measured before and after degradation. Then, the characteristics of the forward voltage degradation were modeled by a combination of PL imaging and electrical measurement, and the calculated characteristics are in good agreement with the measured ones. Finally, we tested the SiC MOSFETs under various stress conditions and evaluated the velocity of the SF expansion by calculation. These results indicate that the velocity of SF expansion increases with increasing forward current density and junction temperature.

机译：仅提供摘要表格。完整的演示文稿未作为会议记录的一部分公开发布。我们提出一个模型来解释4H-SiC MOSFET中体二极管的正向电压降级，并评估SF扩展的速度。首先，通过使用原位光致发光（PL）观察，我们研究了堆垛层错（SF）如何从4H-SiC外延层中的基面位错（BPD）扩展。其次，在退化前后开发并测量了双扩散MOSFET。然后，通过PL成像和电学测量相结合对正向电压降级的特性进行建模，计算出的特性与实测值吻合良好。最后，我们在各种应力条件下测试了SiC MOSFET，并通过计算评估了SF膨胀的速度。这些结果表明，SF膨胀的速度随着正向电流密度和结温的增加而增加。

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来源
《2016 European Conference on Silicon Carbide amp; Related Materials》|2016年|1-1|共1页
会议地点 Halkidiki(GR)
作者
K. Konishi; R. Fujita; A. Shima; Y. Shimamoto;
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作者单位

Center for Technology Innovation - Electronics, Research Development Group, Hitachi, Ltd. 1-280, Higashi-Koigakubo, Kokubunnji-shi, Tokyo 185-8601, Japan;

Center for Technology Innovation - Electronics, Research Development Group, Hitachi, Ltd. 1-280, Higashi-Koigakubo, Kokubunnji-shi, Tokyo 185-8601, Japan;

Center for Technology Innovation - Electronics, Research Development Group, Hitachi, Ltd. 1-280, Higashi-Koigakubo, Kokubunnji-shi, Tokyo 185-8601, Japan;

Center for Technology Innovation - Electronics, Research Development Group, Hitachi, Ltd. 1-280, Higashi-Koigakubo, Kokubunnji-shi, Tokyo 185-8601, Japan;

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原文格式 PDF
正文语种 eng
中图分类
关键词
P-i-n diodes; MOSFET; Schottky diodes; Degradation; Voltage measurement; Temperature measurement; Stacking;

机译：P-i-n二极管; MOSFET;肖特基二极管;退化;电压测量;温度测量;堆叠;

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专利

1. Modeling of Stacking Fault Expansion Velocity of Body Diode in 4H-SiC MOSFET [J] . K. Konishi, R. Fujita, A. Shima, Materials science forum . 2017,第期

机译：4H-SiC MOSFET体二极管堆叠故障扩展速度的建模
2. Modeling and Evaluation of Stacking Fault Expansion Velocity in Body Diodes of 3.3kV SiC MOSFET [J] . Konishi Kumiko, Fujita Ryusei, Shima Akio Journal of Electronic Materials . 2019,第3期

机译：3.3kV SIC MOSFET体二极管堆垛机膨胀速度的建模与评价
3. Phase field model of single Shockley stacking fault expansion in 4H-SiC PiN diode [J] . Kano Akira, Goryu Akihiro, Kato Mitsuaki, Japanese journal of applied physics . 2021,第2期

机译：4H-SIC引脚二极管中单震撼堆垛机故障扩展的相现场模型
4. Modeling of stacking fault expansion velocity of body diode in 4H-SiC MOSFET [C] . K. Konishi, R. Fujita, A. Shima, European Conference on Silicon Carbide Related Materials . 2016

机译：4H-SIC MOSFET体二极管堆叠故障膨胀速度的建模
5. Modeling and Validation of 4H-SiC Low Voltage MOSFETs for Integrated Circuit Design. [D] . Ahmed, Shamim. 2017

机译：用于集成电路设计的4H-SiC低压MOSFET的建模和验证。
6. Confocal photoluminescence investigation to identify basal stacking fault’s role in the optical properties of semi-polar InGaN/GaN lighting emitting diodes [O] . Y. Zhang, R. M. Smith, L. Jiu, -1

机译：共聚焦光致发光研究以识别基础堆叠缺陷在半极性InGaN / GaN发光二极管的光学特性中的作用
7. Observation of the generation of stacking faults and active degradation measurements on off-axis and on-axis 4H-SiC PiN diodes [O] . Thierry-Jebali Nicolas, Hassan Jawad, Lazar Mihai, 2012

机译：4H-siC piN二极管，用于在轴外和轴上产生堆垛层错和主动降级

Modeling of stacking fault expansion velocity of body diode in 4H-SiC MOSFET

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