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Very high aspect ratio through silicon via reflectometry

机译:通过硅通过反射测量法非常高的纵横比

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Through Silicon Via (TSV) technology is a key feature of new 3D integration of circuits by creation of interconnections using vias, which go through the silicon wafer. Typically, the highly-selective Bosch Si etch process, characterized by a high etch rate and high aspect ratio and forming of scallops on the sidewalls is used. As presented in this paper, we have developed an experimental setup and a respective evaluation algorithm for the control and monitoring of very high aspect ratio TSV profiles by spectroscopic reflectometry. For this purpose square via arrays with lateral dimension from 3 to 10 μm were fabricated by a Bosch etch process and analyzed by our setup. By exploiting interference and diffraction effects of waves reflected from the top and bottom surfaces as well as from the side walls of the TSV patterns, the measurements provided etch depths, CD values and scallop periods. The results were compared with data obtained by a commercial wafer metrology tool. Aspect ratios of up to 35:1 were safely evaluable by our setup.
机译:通过硅通孔(TSV)技术是通过使用硅晶片创建互连的互连来实现电路的新三维集成的关键特征。通常,使用具有高蚀刻速率和高纵横比以及侧壁上的扇贝形成的高选择性博世SI蚀刻工艺。如本文介绍,我们开发了一种通过光谱反射测缝控制和监测非常高纵横比TSV谱的相应评估算法。对于此目的,通过横向尺寸的阵列,通过博世蚀刻工艺制造了3至10μm的横向尺寸并通过我们的设置分析。通过利用从顶部和底表面反射的波的干扰和衍射效果以及从TSV图案的侧壁,测量提供了蚀刻深度,CD值和扇贝时段。将结果与商业晶片计量工具获得的数据进行比较。高达35:1的宽高比通过我们的设置安全地评估。

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