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Influence of metal deposition temperature on deep-submicrometer metal lithography

机译：金属沉积温度对深亚微米金属光刻的影响

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Abstract: This paper describes some of the methodologies employed to achieve rapid yield learning on 0.25 micrometer, three-layer metal CMOS process. This includes: (1) design of a manufacturing-representative process qualification vehicle which readily lends itself to failure analysis and (2) the tools employed to define and resolve yield-limiting mechanisms in an expeditious manner. Electrical SRAM bitmapping, physical failure analysis and in-line inspection were used to identify and resolve a primary failure mechanism on the 0.25 micrometer, CMOS process. In this instance, small metal landing pads, which are typically used to support stacked contact/via process architectures, were shown to lose adhesion and topple over at various locations within the SRAM circuitry. Further in-process investigations showed that this problem could be modulated and eliminated through changes in the metal deposition temperature. Lowering the metal deposition temperature eliminated this problem and led to improvements in both memory and logic yields. !3
机译：摘要：本文介绍了一些在0.25微米三层金属CMOS工艺上实现快速成品率学习的方法。这包括：（1）设计具有制造代表性的过程认证工具，使其很容易进行故障分析；（2）用于快速定义和解决产量限制机制的工具。电气SRAM位图，物理故障分析和在线检查被用来识别和解决0.25微米CMOS工艺上的主要故障机制。在这种情况下，通常用于支撑堆叠式接触/通孔工艺架构的小型金属焊盘在SRAM电路内的各个位置失去附着力并倾覆。进一步的过程中研究表明，可以通过改变金属沉积温度来解决此问题。降低金属沉积温度消除了这个问题，并导致了存储器和逻辑成品率的提高。 ！3

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