• 主题
高级搜索  >
历史搜索 清空历史
首页> 外文学位 >A study of nanometer semiconductor scaling effects on microelectronics reliability.
【24h】

A study of nanometer semiconductor scaling effects on microelectronics reliability.

机译：纳米半导体尺度对微电子可靠性影响的研究。

获取原文
获取原文并翻译 | 示例
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

The desire to assess the reliability of emerging scaled microelectronics technologies through faster reliability trials and more accurate acceleration models is the precursor for further research and experimentation in this relevant field. The effect of semiconductor scaling on microelectronics product reliability is an important aspect to the high reliability application user. From the perspective of a customer or user, who in many cases must deal with very limited, if any, manufacturer's reliability data to assess the product for a highly-reliable application, product-level testing is critical in the characterization and reliability assessment of advanced nanometer semiconductor scaling effects on microelectronics reliability. This dissertation provides a methodology on how to accomplish this and provides techniques for deriving the expected product-level reliability on commercial memory products.;Competing mechanism theory and the multiple failure mechanism model are applied to two separate experiments; scaled SRAM and SDRAM products. Accelerated stress testing at multiple conditions is applied at the product level of several scaled memory products to assess the performance degradation and product reliability. Acceleration models are derived for each case. For several scaled SDRAM products, retention time degradation is studied and two distinct soft error populations are observed with each technology generation: early breakdown, characterized by randomly distributed weak bits with Weibull slope beta=1, and a main population breakdown with an increasing failure rate. Retention time soft error rates are calculated and a multiple failure mechanism acceleration model with parameters is derived for each technology. Defect densities are calculated and reflect a decreasing trend in the percentage of random defective bits for each successive product generation.;A normalized soft error failure rate of the memory data retention time in FIT/Gb and FIT/cm2 for several scaled SDRAM generations is presented revealing a power relationship. General models describing the soft error rates across scaled product generations are presented. The analysis methodology may be applied to other scaled microelectronic products and key parameters.
机译：通过更快的可靠性试验和更准确的加速度模型来评估新兴规模微电子技术的可靠性的愿望，是在相关领域进行进一步研究和实验的先驱。半导体缩放对微电子产品可靠性的影响是高可靠性应用用户的重要方面。从客户或用户的角度来看，在许多情况下，他们必须处理非常有限的（如果有的话）制造商的可靠性数据以评估产品是否具有高度可靠的应用，产品级别的测试对于高级产品的特性和可靠性评估至关重要纳米半导体缩放对微电子可靠性的影响。本论文为实现这一目标提供了一种方法论，并为推导商业存储产品的预期产品级可靠性提供了技术。竞争机制理论和多重失效机制模型分别用于两个独立的实验；扩展的SRAM和SDRAM产品。在多个扩展内存产品的产品级别上，在多种条件下进行了加速压力测试，以评估性能下降和产品可靠性。针对每种情况导出加速模型。对于几种规模化的SDRAM产品，研究了保留时间的降低，并观察到每种技术一代都有两个不同的软错误群体：早期崩溃，其特征​​是具有Weibull斜率β= 1的随机分布的弱位，以及随着故障率增加而发生的主要群体崩溃。计算保留时间的软错误率，并为每种技术推导具有参数的多重故障机制加速模型。计算出缺陷密度，并反映出每个连续产品生成的随机缺陷位的百分比的下降趋势。提出了几代SDRAM的FIT / Gb和FIT / cm2存储器数据保留时间的归一化软错误失败率揭示一种权力关系。提出了描述不同规模产品中的软错误率的通用模型。该分析方法可以应用于其他按比例缩放的微电子产品和关键参数。

著录项

  • 作者

    White, Mark.;

  • 作者单位

    University of Maryland, College Park.;

  • 授予单位 University of Maryland, College Park.;
  • 学科 Engineering Electronics and Electrical.;Engineering Mechanical.
  • 学位 Ph.D.
  • 年度 2009
  • 页码 240 p.
  • 总页数 240
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;机械、仪表工业;
  • 关键词

  • 入库时间 2022-08-17 11:38:29

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号